1. Field of the Invention
The present invention generally relates to data communication and, in particular, to a system and method for controlling voltages of signals interfaced with a processing element.
2. Related Art
Most microprocessors that are embodied in integrated circuit microchips (chips) include a debug port for interfacing signals with the core of the microprocessor chip. As known in the art, the core of a microprocessor chip is a portion of the microprocessor chip that executes instructions and processes data. The debug port electrically connects external connections directly to the components of the core. Typically, the external connections transmit signals to and from an emulator, which communicates with the microprocessor core.
Most microprocessor cores operate at standard TTL (transistor-transistor logic) or CMOS (complementary metal-oxide semiconductor) voltage levels. Furthermore, a buffer usually separates the debug port from the emulator. Since many emulators communicate signals having voltages higher than those compatible with standard TTL or CMOS, the buffer is designed to translate the signals communicated between the emulator and the core to appropriate voltages. For example, the buffer receives signals from the emulator and translates the voltages of these signals into voltages compatible with the core before transmitting the signals to the debug port. Conversely, the buffer receives signals from the debug port and translates the voltages of these signals into voltages compatible with the emulator before transmitting the signals to the emulator. The buffer is usually an integrated circuit (IC) designed to implement the aforementioned functionality.
As a result of improvements in technology, especially in the area of microfabrication production, the operating voltages of microprocessor cores are being reduced. In fact, the operating voltages of some microprocessor cores are now below standard TTL and CMOS levels. As a result, current buffer designs are inadequate to interface signals with these microprocessor cores having low operating voltages. In this regard, current buffers compatible with TTL or CMOS levels fail to reduce the voltages of the signals received from the emulator to a low enough voltage to prevent damage to the core. In addition, these buffers also misinterpret many logical high signals output from the core as logical low signals because the voltages of these signals are not high enough to qualify as logical high, when the buffer is comparing the signals to TTL or CMOS levels.
Thus, a heretofore unaddressed need exists in the industry for providing a system and method of interfacing signals with a core of a microprocessor when the core is operating at voltages below standard TTL or CMOS voltages.